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Modeling of 11-Level Cascade Multilevel STATCOM

Modeling of 11-Level Cascade Multilevel STATCOM


FULL PAPER International Journal of Recent Trends in Engineering, Vol 2, No. 5, November 2009

Modeling of 11-Level Cascade Multilevel STATCOM
Jagdish Kumar1, Biswarup Das2, and Pramod Agarwal2
1,2

Indian Institute of Technology Roorkee, Roorkee, India Emails: jk_bishnoi@yahoo.com, biswafee@iitr.ernet.in, pramgfee@iitr.ernet.in control system design technique requires a suitable and accurate system model. Most of literatures [5]-[7] deal with the modeling of multipulse type inverter, where it is simple to develop an analytical model because structure of the multipulse inverter is fixed. But in case of multilevel inverters the structure is variable with time since dc sources are sequentially switched in and out of the current circuit. The major challenge in multilevel inverters modeling is how to represent this variable structure [8]. The present paper deals with the mathematical modeling of multilevel STATCOM, where, an equivalent value of dc sources (in general, capacitors) over one cycle period is computed using principle of energy equivalence. The mathematical model is developed using this equivalent capacitor value for analysis and control system design purpose. II. MULTILEVEL STATCOM OPERATION A. Basics The multilevel STATCOM configuration consists of a voltage source inverter, dc side capacitors (C) with voltage vdc on it, and a coupling reactor (LC) or a transformer. The ac voltage difference across the coupling reactor produces reactive power exchange between the STATCOM and the power systems at the point of common coupling (PCC). If the output voltage of the STATCOM (vc) is more than the system voltage (vl), in that case, reactive power is supplied to the power system, while reactive power goes to STATCOM if vc is less than that of vl. To take effect of this bidirectional flow of reactive power, the STATCOM output voltage should be varied according to requirement of reactive power compensation, and this can be accomplished in two ways: i) by changing the switching angles while maintaining the dc capacitor voltage at a constant level (inverter type I control) or ii) keeping switching angles fixed and varying the dc capacitors voltages (inverter type II control) [5]. The variation of dc capacitors voltages is simply achieved by varying the active power transfer between STATCOM and power system by adjusting phase angle between vc and vl. Each of these control schemes has their own merits and demerits. In general, inverter type II control is preferred where very fast voltage control is not required such as in power system applications because THD injected can be minimized in this case [5]. In this work inverter type II 352

Abstract—This paper presents analytical approach for modeling of 11-level cascade multilevel STATCOM connected to power system for voltage regulation applications. A technique based on energy equivalence is proposed for computation of equivalent capacitance which represents true value of variable structure of capacitances connected in individual H-bridges. The necessity of equivalent capacitor is an essential requirement for accurate modeling and control system design for STATCOM. Index Terms— cascade multilevel inverter, modulation index, static synchronous compensator, model order reduction, total harmonic distortion.

I. INTRODUCTION Static Synchronous Compensator (STATCOM) is a power electronics based flexible alternating current transmission systems (FACTS) device extensively used for the purpose of reactive power compensation in the power systems. The main component of STATCOM is a voltage source inverter (VSI), which may be of multipulse or multilevel type. As compared to the hardswitched two-level pulse width modulation inverters, multilevel inverters offer several advantages such as their capabilities to operate at high voltage with lower dv/dt per switching, high efficiency, low electromagnetic interference etc [1]-[3]. Apart from being used in STATCOM, the multilevel inverters can provide important applications in distributed energy systems where ac voltage can be obtained by connecting dc sources such as batteries, fuel cells, solar cells, rectified wind turbines etc at input side of the inverters. The ac power thus obtained can be used directly for hybrid electric vehicles or may be interfaced to utility [2]-[4]. The multilevel inverters are further classified into (i) diode-clamped, (ii) flying capacitors, and (iii) cascade multilevel inverter (CMLI). Among these three, CMLI has a modular structure and requires least number of components as compared to other two topologies; as a result, it is widely used for above mentioned applications [4]. To analyze the dynamics of multilevel STATCOM, PSCAD/MATLAB type software are mostly used. The simulations with these programs are accurate but studies carried out are generally based on trial and error which requires much time and labor. Alternatively, control system design technique can be used, resulting in shorter design time with less effort. However, the application of
Corresponding Author: Jagdish Kumar, Tel. No. +91-9410747840

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FULL PAPER International Journal of Recent Trends in Engineering, Vol 2, No. 5, November 2009
control scheme has been applied. The basic operating configuration of STATCOM is shown in Fig. 1. B. Cascade Multilevel Inverter The CMLI consists of a number of H-bridge inverter units with separate dc source for each unit and is connected in cascade or series as shown in Fig. 2. Each H-bridge can produce three different voltage levels: +Vdc, 0, and –Vdc by connecting the dc source to ac output side by different combinations of the four switches S1, S2, S3, and S4. The ac output of each H-bridge is connected in series such that the synthesized output voltage waveform is the sum of all of the individual H-bridges’ outputs [2][4]. By connecting the sufficient number of H-bridges in cascade and using proper modulation scheme, a nearly sinusoidal output voltage waveform can be synthesized. The number of levels in the output phase voltage is given as 2s+1, where s is the number of H-bridges used per phase. Fig. 3 shows an 11-level output phase voltage waveform using five H-bridges, where angles α1, α2, α3, α4, and α5 are switching angles of H-bridges H1, H2, H3, H4, and H5 respectively. The magnitude of the ac output phase voltage is given by van = va1+va2+va3+va4+va5 [3]. C. Switching Angles Selection To synthesize multilevel ac output voltage using different levels of dc inputs, the semiconductor devices must be switched on and off in such a way that desired fundamental voltage obtained is nearly sinusoidal i.e. having minimum harmonic distortions. Different switching techniques are available for computing switching angles for the semiconductor devices [9]. For power system applications, generally fundamental frequency switching scheme is considered more suitable; in this scheme the devices are switched on and off once in every cycle, thereby producing less switching losses (more efficiency) [9]. Generally, the switching angles at fundamental frequency are computed by solving a set of nonlinear equations known as selective harmonic elimination (SHE) equations [3]-[4]. In SHE technique, in general, lower order harmonics are eliminated at the cost of generation of higher order harmonics, thereby increasing the total harmonic distortion (THD) in vc. In the present work, an optimization technique is used for computation of switching angles which minimize THD due to all harmonic components up to 49th order; as a result, significant amount of THD reduction can be achieved as compared to SHE technique [10]. In general, the magnitude of voltage produced by 11level CMLI is given by following relation [3]:
Transmission Line

vl LC vc

Voltage Source Inverter

Control

C
vdc
STATCOM

Fig. 1. Basic STATCOM configuration.

Fig. 2. Configuration of single-phase CMLI.

Vn =

4Vdc (cos ( nα 1 ) + ... + cos (nα 5 )) n =1, 3, 5 nπ





(1)

From (1), the magnitude of fundamental voltage is as follows:

V1 =

4Vdc

π

(cos (α1 ) + ... + cos (α 5 ))

(2)
Fig. 3. Output voltage waveform of an 11- level CMLI at fundamental frequency switching.

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Where n is the order of harmonic components and α1 … α5 are switching angles for five H-bridges such that 0 ≤ α1 < α2 < … < α5 ≤ π/2. In three-phase power system, 353

FULL PAPER International Journal of Recent Trends in Engineering, Vol 2, No. 5, November 2009
triplen harmonic components are absent in line to line voltages, therefore, only non-triplen odd harmonic components of vc are considered for THD optimization. The objective function is formulated as follows:

Φ (α1 , α 2 , α 3 , α 4 , α 5 ) = V5 + V7 + ... + V49
2 2

2

(3)

The objective function (3) is minimized with equality constraints given by (2) and switching angles range 0 ≤ α1 < α2 < … < α5 ≤ π/2 using MATLAB/ Optimization Toolbox [11]. The switching angles and corresponding THD for the variation of modulation index (m) from 0 to 1 are calculated; the switching angles corresponding to minimum THD have been selected for the operation of CMLI. The minimum THD is obtained at m = 0.9240. The switching angles (in radians) and THD corresponding to this value of m are given in Table I. It is to be noted that modulation index (m) is defined as the ratio of ac output voltage obtained to the maximum obtainable ac output voltage [10].
TABLE I m 0.924 α1 0.056 α2 0.169 α3 0.281 α4 0.474 α5 0.668 THD 2.28% Fig. 4. (a) Multilevel STATCOM connected to power system (b) Phasor relation of d-q components of currents and voltages.

III. MATHEMATICAL MODELING OF STATCOM Single line diagram of a single generator feeding power to a load through transmission line is shown in Fig. 4(a). An inductive load is assumed to be connected at load bus. The load bus voltage may vary either due to variation in amount or nature of the load or it may vary due to supply side disturbances. In either case, it is required to keep the load voltage at desired level by generating/absorbing reactive power using STATCOM. For this purpose, a cascade multilevel STATCOM is connected at the load bus. As discussed in previous section, the amount of reactive power compensation is decided by the angle difference between load voltage and STATCOM output voltage, furthermore, the load voltage depends on the amount of reactive power compensation; therefore, a relation between this phase angle and load voltage is required to be established for proper and effective design of feedback control scheme. In following section this relation is established for the configuration shown in Fig. 4. Different symbols as used in Fig. 4(a) are as follows: RS and LS are resistance and inductance of transmission line; RC and LC are coupling reactor’s resistance and inductance; active and reactive loads have been represented by RL and LL; whereas, RP represents switching losses. Various current and voltage variables are shown at appropriate place. In Fig. 4(b), d-q components of corresponding voltage and currents are shown. In terms of instantaneous variables shown in Fig. 4, the ac-side circuit equation of STATCOM can be written as follows (calculations are carried out on per unit basis):

dic / dt = ?(ωRC / LC )ic + ω (vc ? vl ) / LC

(4)

Using the Park’s transformation of variable as used in [5], equation (4) can be transformed into the synchronously rotating reference frame as follows:

? ? RC ? L i ? ? d cd C ?i ? = ω ? dt ? cq ? ? ?1 ? ?

? 1 ? ?i ? ω ?v cd ? v ld ? ? ? cd ? + ? (5) ? RC ? ?i cq ? LC ? ? v cq ? v lq ? LC ? ?

Where, ω is the speed of synchronously rotating reference frame in radians per second, The d-q components of STATCOM voltage is given as (6) vcd = kmvdc cos(α ), v cq = kmvdc sin(α ) Where m is modulation index, k= π/4 and vdc is total capacitor voltage. The dynamics of capacitor can be expressed as: (7) dv dc / dt = ?ωC eq (i dc + v dc / R P ) Neglecting switching and coupling reactor resistive losses, power at dc and ac sides of the inverter is equal, therefore, the capacitor current is given as: (8) i dc = 3km(i cd cos(α ) + i cq sin(α )) / 2 Writing circuit equations for source and load variables in similar way as it has been written for STATCOM variables and applying transformation as applied in case of equation (4); load and source currents expression can be written as follows:

? ? RL ? L d ?ild ? L ?i ? = ω ? dt ? lq ? ? ?1 ? ?

? 1 ? ?ild ? ω ?vld ? ?? ? + ? ? R L ? ?ilq ? LL ? ?vlq ? LL ? ?

(9)

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FULL PAPER International Journal of Recent Trends in Engineering, Vol 2, No. 5, November 2009
? ? RS ? L i ? ? d sd ? S ω = ? ? dt ?i sq ? ? ?1 ? ? ? 1 ? ?i ? ω ?v s ? vld ? ? ? sd ? + ? (10) ? R S ? ?i sq ? Ls ? ? ? vlq ? LS ? ?
Based on energy equivalence concept, equivalent capacitor is calculated as follows: Considering half wave of Fig. 3, the first H-bridge conducts from α1 to π-α1; it means capacitor C1 remains in the circuit for a period of π-2α1. Similarly, second Hbridge conducts from α2 to π-α2 i.e. capacitor (C2) remains in the circuit for a period of π-2α2, proceeding in similar way the third, fourth and fifth capacitors conduct for π-2α3, π-2α4, and π-2α5 period respectively. Let an equivalent capacitor for phase A be denoted by CA with V voltage across it and it delivers same energy as delivered by these five capacitors in half cycle. This statement can be written mathematically as follows:

Again from fig. 4(a), expression for load current can be written in terms of its d-q components as follows: (11) ild = i sd + icd , ilq = i sq + icq Combining equations (5) - (11), following set of statespace equations is obtained:

? ( L L + LC ) ? ?i sd ? ? i sd ? ? ? ?i ? σ ?i ? ? ? 0 ? sq ? ? sq ? ? ?L ? d ? ? (12) L i cd = ω [ A] ? i cd ? + ω ? ?v s dt ? ? ? ? σ ? ? ?i cq ? ? i cq ? 0 ? ? ? ? ? ? ? ?v dc ? ? ?v dc ? 0 ? ? 0 ?)? ?σ 2 ? k1 cos( ?? σ1 1 ? ?1 ? σ 0 ?) ? ?σ 2 ? k1 sin( 1 ? ? 1 k2 cos( ?) ? ?σ 4 A = ?? σ3 0 ? ? k2 sin( ?) ? ?1 ?σ 4 ? 0 ? σ3 ? 0 0 ? k3 cos( ?) ? k3 sin( ?) Ceq / RP ? ? ?
Expression for load voltage can be obtained by eliminating derivative terms of source current in equation (10) with the help of relation given in equation (12), resulting expression of vl in terms of its d-q components is:
2 2 v l = v ld + v lq

1 1 i =5 2 C V d ( ω t ) = (∑ A 2∫ 2 i =1 0

π

π ?α i

∫C v α
i

2 i i

d (ωt ))

(14)

Here Ci and vi represent capacitance and voltage across the capacitor in individual H-bridges of phase A leg. In general, individual capacitor voltage needs to be well balanced in order to have less distortion in output ac voltage; therefore, a rotating switching scheme as described in [3] is used. In rotating switching scheme, the switching angles are rotated among all H-bridges of a leg turn by turn, therefore, all capacitors should have equal value i.e. C1 = C2 =…= C5 = C (let). Voltage on all capacitors needs to be equal and it would be equal to V/5. Simplifying equation (14) gives an equivalent value of capacitor in phase A and it is given as C A = (C / 25π )[5π ? 2(α 1 + α 2 + α 3 + α 4 + α 5 )] (15) For three-phase configuration, three legs are connected in parallel and switching angles for each phase are equal (only these are displaced by 2π/3), therefore, equivalent capacitor value (Ceq) over a cycle can be taken as three times to the equivalent value of each phase, i.e. Ceq = (3C / 25π )[5π ? 2(α1 + α 2 + α 3 + α 4 + α 5 )] (16)

vld = β 1i sd + β 2 icd + β 3 kmvdc cos(? ) + β 4 v s

From relation (16), equivalent value of capacitor is computed at two extreme operating switching angles of Different notations used in equations (12) and (13) are CMLI: (i) when none of H-bridges conduct (producing related with system parameters in following way: zero output voltage) i.e. α1 = α2 =… = α5 = π/2, in this σ = (LS LL + LS LC + LCLL ),σ1 = (RS LL + RS LC + RLLC ) /σ, case Ceq = 0 (from equation (16)); (ii) when all H-bridges conduct simultaneously (producing maximum output σ 2 = ( RL LC ? RC LL ) / σ , σ 3 = ( RL LS ? RS LL ) / σ , voltage, corresponding to unity modulation index). The σ4 = (RC LS + RLLS + RC LL ) /σ , β1 = LC (RLLS ? RS LL ) /σ , switching angles in this case are zero, i.e. α1 = α2 =… = α5 β 2 = LS ( RL LC ? RC LL ) / σ , β 3 = LS LL / σ , β 4 = LL LC / σ , = 0, using equation (16) Ceq = 3C/5. These two extreme values of equivalent capacitor seem to be true because k1 = LL km / σ , k 2 = (LS + LL )km / σ , k3 = 3km / 2Ceq , when all H-bridges conduct simultaneously, equivalent capacitor would be 3C/5. Therefore, it validates the ? =α ? δ. proposed procedure for equivalent capacitor calculation. Equations (12) – (13) are nonlinear, if φ is regarded Moreover, a similar relation has been used in [12] for five as input variable and vl as output variable, in that case, a level CMLI validating the proposed procedure. useful relation between these two variables can be Linearizing equation (12)-(13) around particular obtained for small deviation about a chosen steady-state steady-state operating point and linearized equations are equilibrium point. This helps in deriving the transfer as follows: function between these two variables. d?X / dt = A? ?X + B? ?? ; ?vl = C ? ?X + D? ?? So far we have considered a single capacitor (Ceq) T connected to CMLI at dc side (Fig. 4(a)), it has been Where ?X = [ ?i sd ?i sq ?icd ?icq ?v dc ] , A? is assumed that the value of this single capacitor is equal to equal to A at operating point, B?, C?, and D? are given as: effective value of all capacitors connected to individual H-bridges in 3-legs. Now, in order to get an equivalent capacitor value to obtain appropriate transfer function for controller design a true value of Ceq is required. (13)
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vlq = β 1i sq + β 2 icq + β 3 kmv dc sin(? )

355

FULL PAPER International Journal of Recent Trends in Engineering, Vol 2, No. 5, November 2009
k1v dc 0 sin(? 0 ) ? ? ? ? ? k1 v dc 0 cos(? 0 ) ? ? ? ? k 2 v dc 0 sin(? 0 ) B? = ω ? ? ? k 2 v dc 0 cos(? 0 ) ? ? ?k 3 (icd 0 sin(? 0 ) ? icq 0 cos(? 0 ))? ? ?
load bus voltage and load angle (phase angle between system load voltage and STATCOM output voltage) has been derived. The derived transfer function is very useful in control system design analysis.

β1vld 0 ? ? ? ? β1vlq 0 ? ? 1 ? ? β 2 vld 0 C? = vlo ? ? β 2 vlq 0 ? ? ?β 3 k (vld 0 cos(? 0 ) + vlq 0 sin(? 0 ))? ? ? β 3 kv dc (?v ld 0 sin(? 0 ) + v lq 0 cos(? 0 )) D? = vl 0

T

[

]

Fig. 6. Step response of load voltage.

(17)

REFERENCES
[1] Fang Zheng Peng et al., “A Multilevel Voltage-Source Inverter with Separate DC Sources for Static Var Generation”, IEEE Trans. on Industry Applications, vol. 32, no. 5, pp. 1130-1138, September/October 1996. [2] F. Z. Peng, J. W. McKeever and D. J. Adams, “Cascade Multilevel Inverters for Utility Applications”, IECON Proceedings (Industrial Electronics Conference), vol. 2, pp. 437-442, 1997. [3] L. M. Tolbert, F. Z. Peng and T.G. Habetler, “Multilevel converters for large electric drives”, IEEE Transactions on Industry Applications, vol. 35, no. 1, pp. 36-44, Jan. /Feb. 1999. [4] Jose Rodriguez, J S Lai and F. Z. Peng, “Multilevel Inverters: A Survey of Topologies, Controls, and Applications”, IEEE Trans. on Industrial Electronics, vol. 49, no. 4, pp. 724-738, August 2002. [5] C. Schauder and H. Mehta, “Vector analysis and control of advanced static VAR compensators”, Proc. Inst. Elect. Eng., vol. 140, no. 4, pp. 299–306, July 1993. [6] Pranesh Rao, and M.L. Crow, “ STATCOM Control for Power System Voltage Control Applications”, IEEE Transaction on Power Delivery, vol. 15, no. 4, pp. 13111317, October 2000. [7] Amit Jain, Karan Joshi, Aman Behal, and Ned Mohan, “Voltage Regulation with STATCOMs: Modeling, Control and Results”, IEEE Transaction on Power Delivery, vol. 21, no. 2, pp. 726-735, April 2006. [8] Dragan Jovcic and Ronny Sternberger, “FrequencyDomain Analytical Model for a Cascaded Multilevel STATCOM”, IEEE Transaction on Power Delivery, vol. 23, no. 4, pp. 2139-2147, July 2007. [9] John N. Chiasson, Leon M. Tolbert, Keith J. McKenzie and Zhong Du, “Control of a Multilevel Converter Using Resultant Theory”, IEEE Transaction on Control Systems Technology, vol. 11, no. 3, pp. 345-353, May 2003. [10] Jagdish Kumar, Biswarup Das and Pramod Agarwal, “Optimized Switching Scheme of a Cascade Multilevel Inverter”, Accepted for Publication in Electric Power Components and Systems, Paper no. UEMP-2009-0455. [11] MATLAB User’s Manual of Optimization Toolbox v7. The Math Works, 2006. [12] Diego Soto, and Ruben Pena, “Nonlinear Control Strategies for Cascaded Multilevel STATCOMs”, IEEE Transactions on Power Delivery, vol. 19, no. 4, October 2004.

State-variables variation as a function of load angle (?φ) is plotted in Fig. 5 and these results are similar as obtained in [5] for multipulse inverter. Corresponding steady-state values of variables and system parameters are given below (in pu):

icd 0 = ?0.0 , i cq 0 = ?0.23, vld 0 = 0.0, v dc 0 = 0.95, R P = 78, C eq = 0.07, R S = 0.02, L S = 0.08,
RC = 0.0, LC = 0.52, R L = 2, LL = 4.

vlq 0 = ?0.01, ? 0 = ?0.0103 rad , ω = 314 rad / sec

The transfer function obtained from (17) relating ?vl and ?φ is of fifth order and it is reduced using model order reduction technique [11] to third order as given below.

?v l ( s ) 4.09 s 2 + 730 s ? 62780 = 3 ?? ( s ) s + 261s 2 + 5048 s + 27670

(18)

Using transfer function given by (18), a PI controller is designed based on Ziegler-Nichols technique and corresponding step response of load voltage is shown in Fig. 6.

Fig. 5. Steady-state solutions.

IV. CONCLUSION Mathematical modeling of a cascade multilevel inverter is carried out in this paper for transfer function derivation. More importantly, a concept of equivalent capacitor representing complete variable structure of CMLI is introduced. By taking into account the equivalent value of capacitor a transfer function relating
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